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Design Verification Strategy Engineer – 81298

Advanced Micro Devices Inc.

This is a Part-time position in Hamilton, ON posted April 27, 2021.

What you do at AMD changes everything At AMD, we push the boundaries of what is possible.

We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies
– building blocks for gaming, immersive platforms, and the data center.

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.

It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.

If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

Design Verification Strategy Engineer ROLE: We are the Multimedia Methodology team based in Markham, Ontario, Canada.

We focus on driving modeling and verification frameworks, methodology and related infrastructure, and cutting-edge HW acceleration.

As a member of this progressive team, you will be responsible for shaping the future of our design and verification processes, architecting, and implementing verification and modeling frameworks, and deploying seamless design acceleration solutions.

You will have direct hands-on exposure to verification methodology, design/debug, flow automation, and framework deployment.

KEY RESPONSIBILITIES: Architect and develop HLS-based verification and modeling frameworks and flows.

Enable re-use of SystemC/C++ based models for use in architecture, HLS driven verification, and software development.

Develop and adapt verification frameworks and models for hardware acceleration solutions.

Automate and improve verification and acceleration efficiency.

Think outside the box REQUIREMENTS: 5 years of hands-on experience or exposure in the following areas: Developing and integrating high level C++ IP models into UVM-like simulation environments for HLS.

Experience developing IP verification frameworks and with a good understanding of testbenches, processes and flows.

Automating workflows in a distributed compute environment Exposure to HW acceleration for design verification, architectural prototyping, and virtual platforms for SW enablement Exposure to HLS flows in conjunction with simulation and acceleration environments Strong in C++, preferably on Linux with exposure to Windows platform Experience and good working knowledge of SystemC and TLM is required Exposure and related experience to HLS based design flows and processes Good understanding of the UVM concepts and System Verilog language is an asset Scripting language experience: Perl, Ruby, Makefile, shell preferred.

Good interpersonal skills (verbal and written).

An organized, enthusiastic self-starter, strong interest in hardware verification methodologies.

EDUCATION: Minimum BaSC/BSEE/CE, or equivalent degree or above LI-EM1 Requisition Number: 81298 Country: Canada State: Ontario City: Markham Job Function:Design AMD is an inclusive employer dedicated to building a diverse workforce.

We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective provincial human rights codes throughout all stages of the recruitment and selection process.

Any applicant who requires accommodation should contact .

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services.